Semiconductor substrate, semiconductor element and method for producing semiconductor substrate

ABSTRACT

A semiconductor substrate includes a single crystal Ga2O3-based substrate and a polycrystalline substrate that are bonded to each other. A thickness of the single crystal Ga2O3-based substrate is smaller than a thickness of the polycrystalline substrate, and a fracture toughness value of the polycrystalline substrate is higher than a fracture toughness value of the single crystal Ga2O3-based substrate.

TECHNICAL FIELD

The invention relates to a semiconductor substrate, a semiconductorelement, and a method for producing a semiconductor substrate.

BACKGROUND ART

Surface activated bonding, which is a method for bonding a singlecrystal substrate to a support substrate, is known (see, e.g., PatentLiterature 1). In the surface activated bonding, the respective bondingsurfaces of two substrates are damaged by Ar (argon) ion bombardment andare then brought into contact with each other, thereby bonding the twosubstrates. In the method of Patent Literature 1, a heat treatment stepis further added to the normal surface-activated bonding process, andheat treatment is performed after bonding the surfaces of the twosubstrates. Due to the heat treatment, the bonding surfaces which turnedinto amorphous by Ar ion bombardment are recrystallized and strongerbonding is obtained between the two substrates due to covalent bonding.

Also, a Schottky barrier diode is known, which includes an epitaxiallayer formed of a Ga₂O₃-based crystal and a highly thermally conductivesubstrate formed of a material having a higher thermal conductivity thanthe Ga₂O₃-based crystal and bonded to the epitaxial layer by the surfaceactivated bonding (see, e.g., Patent Literature 2).

CITATION LIST Patent Literatures

Patent Literature 1: Japanese Patent No. 6061251

Patent Literature 2: JP 2016/31953 A

SUMMARY OF INVENTION Technical Problem

Ga₂O₃-based single crystal has cleavage planes highly likely to causecleavage, and thus has a low crack resistance and breaks easily. Forthis reason, as foundation substrates for growing epitaxial layersformed of a Ga₂O₃-based single crystal, there is a demand for substrateswith excellent mechanical strength and less likely to break.

It is an object of the invention to provide a semiconductor substratewhich includes a layer formed of a Ga₂O₃-based single crystal and isexcellent in mechanical strength, a semiconductor element including thesemiconductor substrate, and a method for producing the semiconductorsubstrate.

Solution to Problem

To achieve the above-mentioned object, an aspect of the inventionprovides a semiconductor substrate according to [1] to [8] below, asemiconductor element according to [9] below and a method for producinga semiconductor substrate according to [10] and [11] below.

[1] A semiconductor substrate, comprising a single crystal Ga₂O₃-basedsubstrate and a polycrystalline substrate that are bonded to each other,wherein a thickness of the single crystal Ga₂O₃-based substrate issmaller than a thickness of the polycrystalline substrate, and afracture toughness value of the polycrystalline substrate is higher thana fracture toughness value of the single crystal Ga₂O₃-based substrate.[2] The semiconductor substrate according to [1], wherein the fracturetoughness value of the polycrystalline substrate is not less than 3MPa·m^(1/2).[3] The semiconductor substrate according to [2], wherein thepolycrystalline substrate comprises a polycrystalline SiC substrate.[4] The semiconductor substrate according to any one of [1] to [3],wherein a bonding strength between the single crystal Ga₂O₃-basedsubstrate and the polycrystalline substrate is not less than 8.3 MPa.[5] The semiconductor substrate according to any one of [1] to [4],wherein a ratio of the thickness of the single crystal Ga₂O₃-basedsubstrate to the thickness of the polycrystalline substrate is not morethan about 20%.[6] The semiconductor substrate according to any one of [1] to [5],wherein the single crystal Ga₂O₃-based substrate has a carrierconcentration of not less than 3×10¹⁸ cm⁻³.[7] The semiconductor substrate according to any one of [1] to [6],wherein the single crystal Ga₂O₃-based substrate comprises a principalplane including a [010] axis.[8] The semiconductor substrate according to [7], wherein the principalplane comprises a (001) plane.[9] A semiconductor element, comprising the semiconductor substrateaccording to any one of [1] to [8].[10] A method for producing a semiconductor substrate, comprising:forming a first amorphous layer by damaging a surface of a singlecrystal Ga₂O₃-based substrate and also forming a second amorphous layerby damaging a surface of a polycrystalline SiC substrate; contacting thefirst amorphous layer with the second amorphous layer; and bonding thesingle crystal Ga₂O₃-based substrate to the polycrystalline SiCsubstrate by performing heat treatment of not less than 800° C. on thesingle crystal Ga₂O₃-based substrate and the polycrystalline SiCsubstrate in the state that the first amorphous layer is in contact withthe second amorphous layer.[11] The method for producing a semiconductor substrate according to[10], wherein a temperature of the heat treatment is not more than 1100°C.

Advantageous Effects of Invention

According to the invention, it is possible to provide a semiconductorsubstrate which includes a layer formed of a Ga₂O₃-based single crystaland is excellent in mechanical strength, a semiconductor elementincluding the semiconductor substrate, and a method for producing thesemiconductor substrate.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a perspective view showing a semiconductor substrate in thefirst embodiment.

FIG. 2A is a vertical cross-sectional view showing a hydrogen ionimplantation step in a process of producing the semiconductor substrate.

FIG. 2B is a vertical cross-sectional view showing a bonding surfacemodification step in the process of producing the semiconductorsubstrate.

FIG. 2C is a vertical cross-sectional view showing a bonding surfacecontacting step in the process of producing the semiconductor substrate.

FIG. 2D is a vertical cross-sectional view showing a heat treatment stepin the process of producing the semiconductor substrate.

FIG. 2E is a vertical cross-sectional view showing a semiconductorsubstrate separation step in the process of producing the semiconductorsubstrate.

FIG. 3 is a vertical cross-sectional view showing a Schottky barrierdiode in the second embodiment.

FIG. 4 is a vertical cross-sectional view showing a MOSFET in the secondembodiment.

FIG. 5 is a transmission electron microscope (TEM) image obtained byobserving the bonded interface between a single crystal Ga₂O₃ substrateand a polycrystalline SiC substrate.

FIG. 6A is a vertical cross-sectional view showing the semiconductorsubstrate to which electrodes for measurement are connected.

FIG. 6B is a graph showing the measured current-voltage characteristicsof the semiconductor substrate.

FIG. 7 is a graph plotting a relation between a ratio of the thicknessof the single crystal Ga₂O₃ substrate to the thickness of thepolycrystalline SiC substrate and vertical thermal conductivity of thesemiconductor substrate shown in Table 4.

DESCRIPTION OF EMBODIMENTS First Embodiment

(Structure of a Semiconductor Substrate)

FIG. 1 is a perspective view showing a semiconductor substrate 1 in thefirst embodiment. The semiconductor substrate 1 is a bonded substrate inwhich a single crystal Ga₂O₃-based substrate 10 is bonded to apolycrystalline substrate 11. The planar shape of the semiconductorsubstrate 1 is typically a circle as shown in FIG. 1 even though it isnot specifically limited.

The single crystal Ga₂O₃-based substrate 10 and the polycrystallinesubstrate 11 of the semiconductor substrate 1 are bonded by the surfaceactivated bonding method (described later), and a predetermined amount(e.g., 1 to 2 atm %) of Ar is contained in the vicinity of the bondedinterface between the single crystal Ga₂O₃-based substrate 10 and thepolycrystalline substrate 11.

In addition, since the single crystal Ga₂O₃-based substrate 10 and thepolycrystalline substrate 11 are bonded by the surface activated bondingmethod using a FBA (Fast Atom Beam) gun (described later), the metalliccontamination density at the bonded interface is low, e.g., theconcentrations of Fe, Ni and Cu are all less than 1×10 cm⁻².

The single crystal Ga₂O₃-based substrate 10 is a substrate formed of aGa₂O₃-based single crystal and is typically a Ga₂O₃ substrate. Thesingle crystal Ga₂O₃-based substrate 10 may be undoped (with nointentional doping) or may contain a dopant such as Si or Sn. When thecarrier concentration of the single crystal Ga₂O₃-based substrate 10 is,e.g., not less than 3×10¹⁸ cm⁻³, a barrier at the bonded interfacebetween the single crystal Ga₂O₃-based substrate 10 and thepolycrystalline substrate 11 disappears, allowing the single crystalGa₂O₃-based substrate 10 to be in ohmic contact with the polycrystallinesubstrate 11.

The Ga₂O₃-based single crystal here means a Ga₂O₃ single crystal or is aGa₂O₃ single crystal doped with an element such as Al or In, and may be,e.g., a (Ga_(x)Al_(y)In_((1-x-y)))₂O₃ (0<x≤1, 0≤y<1, 0<x+y≤1) singlecrystal which is a Ga₂O₃ single crystal doped with Al and In. The bandgap is widened by adding Al and is narrowed by adding In. TheGa₂O₃-based single crystal constituting the single crystal Ga₂O₃-basedsubstrate 10 has, e.g., a β-crystal structure.

The principal plane of the single crystal Ga₂O₃-based substrate 10 ispreferably a plane including a [010] axis (e.g., a (101) plane, a (−201)plane or a (001) plane). In this case, the single crystal Ga₂O₃-basedsubstrate 10 is less likely to break and also has high heat resistance.When having high heat resistance, degradation is less likely to occur inheat treatment at the time of bonding (described later).

Meanwhile, Ga₂O₃-based single crystal has high cleavage along a (100)plane and twinning is likely to occur on the (100) plane as a twin plane(a plane of symmetry) during shoulder expansion in crystal growth by theEFG (Edge-defined Film-fed Growth) method. Thus, to cut out as large apiece of the single crystal Ga₂O₃-based substrate 10 as possible fromthe Ga₂O₃-based single crystal, it is preferable to grow the Ga₂O₃-basedsingle crystal in the b-axis direction so that the (100) plane isparallel to the growth direction of the Ga₂O₃-based single crystal. Thesingle crystal Ga₂O₃-based substrate 10 having a principal planecontaining a [010] axis can be cut out from the Ga₂O₃-based singlecrystal grown in the b-axis direction.

If the semiconductor substrate 1 is required to have particularly highheat resistance, the principal plane of the single crystal Ga₂O₃-basedsubstrate 10 is preferably a (001) plane.

The polycrystalline substrate 11 is a substrate formed of a polycrystal,and it is possible to use, e.g., a polycrystalline SiC substrate, apolycrystalline diamond substrate, a polycrystalline Si substrate, apolycrystalline Al₂O₃ substrate and a polycrystalline AlN substrate asthe polycrystalline substrate 11. In general, polycrystal is producedeasier than a single crystal, hence, it is low in cost.

The single crystal Ga₂O₃-based substrate 10 alone is cleaved and brokenalong a cleavage plane such as a (100) plane or a (001) plane in theevent of occurrence of crack and thus has a relatively low fracturetoughness value. On the other hand, the polycrystalline substrate 11 isless likely to break since cracks, even when occurred, are stopped fromadvancing by the crystal grain boundaries. Thus, the fracture toughnessvalue of the polycrystalline substrate 11 is higher than the fracturetoughness value of the single crystal Ga₂O₃-based substrate 10.Furthermore, to impart sufficient strength to the semiconductorsubstrate 1, the fracture toughness value of the polycrystallinesubstrate 11 (a value obtained by a fracture toughness test inaccordance with JIS R 1607) is preferably not less than 3 MPa·m^(1/2)nwhich is higher than the fracture toughness value of the single crystalGa₂O₃-based substrate 10 regardless of the plane orientation of theprincipal plane of the single crystal Ga₂O₃-based substrate 10.

The semiconductor substrate 1, which is formed by bonding the singlecrystal Ga₂O₃-based substrate 10 to the polycrystalline substrate 11with excellent fracture toughness, has a much higher fracture toughnessvalue and is less breakable than a single crystal Ga₂O₃-based substrateof the same thickness.

In addition, in the semiconductor substrate 1 which is formed by bondingthe single crystal Ga₂O₃-based substrate 10 to the polycrystallinesubstrate 11, the single crystal Ga₂O₃-based substrate 10 is less likelyto break and can be reduced in thickness, allowing for the costreduction. For this reason, the thickness of the single crystalGa₂O₃-based substrate 10 is preferably smaller than the thickness of thepolycrystalline substrate 11.

In addition, since the amount of dopant which can be implanted into thepolycrystalline substrate 11 is much larger than for a single crystalsubstrate, it is possible to reduce resistivity. This is because crystalquality of single crystal substrates is degraded due to defects causedwhen introducing too much dopant and there is thus an upper limit to theamount of dopant to be implanted, but crystal quality of polycrystallinesubstrates is hardly affected by an increase in defects.

For example, while resistivity of a commonly used single crystal SiCsubstrate can be reduced to about 0.02 Ω·cm by implanting N (nitrogen)to the extent that the quality thereof is not affected, resistivity of apolycrystalline SiC substrate can be reduced to not more than 0.01 Ω·cmby implanting N.

As such, resistivity of the polycrystalline substrate 11 can be reduced.Therefore, when used as a substrate for, e.g., a vertical semiconductorelement, power loss of the semiconductor element can be reduced.

In addition, when a substrate formed of a material with a higher thermalconductivity than a Ga₂O₃-based single crystal, such as apolycrystalline SiC substrate, is used as the polycrystalline substrate11, the semiconductor substrate 1 can have higher heat dissipationproperties than a single-layered Ga₂O₃-based single crystal substrate ofthe same thickness. For example, while thermal conductivity of singlecrystal Ga₂O₃ is 13.6 W/(m·K) in a [100] direction and 22.8 W/(m·K) in a[010] direction, thermal conductivities of polycrystalline SiC,polycrystalline Al₂O₃ and polycrystalline AlN are respectively about 330W/(m·K), 32 W/(m·K) and 150 W/(m·K).

By using a substrate with a particularly high thermal conductivity suchas a SiC polycrystalline substrate or a polycrystalline diamondsubstrate as the polycrystalline substrate 11, it is possible to furtherimprove the heat dissipation properties of the semiconductor substrate1.

In addition, to prevent warping, etc., of the semiconductor substrate 1,the polycrystalline substrate 11 is preferably formed of a materialhaving a small difference in thermal expansion coefficient from theGa₂O₃-based single crystal which is the material of the single crystalGa₂O₃-based substrate 10. Examples of polycrystalline material having asmall difference in thermal expansion coefficient from the Ga₂O₃-basedsingle crystal (5.3×10⁻⁶/K in a [100] direction, 8.9×10⁻⁶/K in a [010]direction and 8.2×10⁻⁶/K in a [001] direction) include polycrystallineSiC (4.0×10⁻⁶/K), polycrystalline Al₂O₃ (7.2×10⁻⁶/K) and polycrystallineAlN (4.6×10⁻⁶/K).

(Method for Producing the Semiconductor Substrate)

An example of a method for producing the semiconductor substrate 1 willbe described below. In the example described below, plural singlecrystal Ga₂O₃-based substrates 10 of the semiconductor substrates 1 areformed from one single crystal Ga₂O₃-based substrate, with layersplitting technology involving ablation by hydrogen atoms (also calledSmart Cut™).

FIGS. 2A to 2E are vertical cross-sectional views showing a process ofproducing the semiconductor substrate 1 of the first embodiment.

Firstly, a single crystal Ga₂O₃-based substrate 12 and thepolycrystalline substrate 11 are prepared. Then, their surfaces to bebonded (hereinafter, referred to as “bonding surfaces”) are flattened byCMP (chemical mechanical polishing) or machine polishing, etc.

Next, as shown in FIG. 2A, a hydrogen ion implanted layer 12 a is formedin the single crystal Ga₂O₃-based substrate 12 by implanting hydrogenions to a portion with a predetermined depth from the bonding surface.

A layer split from the single crystal Ga₂O₃-based substrate 12 at thehydrogen ion implanted layer 12 a serving as a splitting plane is to bethe single crystal Ga₂O₃-based substrate 10 of the semiconductorsubstrate 1, as described later. Thus, the depth of the hydrogen ionimplanted layer 12 a from the bonding surface of the single crystalGa₂O₃-based substrate 12 is determined according to the thickness of thesingle crystal Ga₂O₃-based substrate 10 intended to be formed.

Next, as shown in FIG. 2B, an amorphous layer 12 b and an amorphouslayer 11 b are respectively formed on the single crystal Ga₂O₃-basedsubstrate 12 and the polycrystalline substrate 11 by modifying thebonding surfaces thereof.

When Ar neutral atom beam is emitted onto the bonding surfaces of thesingle crystal Ga₂O₃-based substrate 12 and the polycrystallinesubstrate 11 by FAB guns 13, etc., in a vacuum chamber, the surfaces aredamaged and changed from crystalline to amorphous, and the amorphouslayer 12 b and the amorphous layer 11 b are thereby formed.

In the step of forming the amorphous layer 12 b and the amorphous layer11 b, atomic bonds are exposed by removing an oxide film or anadsorption layer from the bonding surfaces of the single crystalGa₂O₃-based substrate 12 and the polycrystalline substrate 11, and thesurfaces are thereby activated. In addition, since this step isperformed in vacuum, oxidation, etc., of the activated surfaces does notoccur and the activated state is maintained.

Next, as shown in FIG. 2C, the amorphous layer 12 b of the singlecrystal Ga₂O₃-based substrate 12 is brought into contact with theamorphous layer 11 b of the polycrystalline substrate 11 in vacuum. Thesingle crystal Ga₂O₃-based substrate 12 and the polycrystallinesubstrate 11, after being brought into contact with each other, may befixed by a jig, etc., to prevent separation.

Next, as shown in FIG. 2D, heat treatment is performed on the singlecrystal Ga₂O₃-based substrate 12 and the polycrystalline substrate 11 inthe state in which the amorphous layer 12 b is in contact with theamorphous layer 11 b, thereby bonding the single crystal Ga₂O₃-basedsubstrate 12 to the polycrystalline substrate 11. The heat treatment maybe performed under reduced pressure in the vacuum chamber or may beperformed in another furnace other than the vacuum chamber.

By performing the heat treatment, both the amorphous layer 12 b and theamorphous layer 11 b are recrystallized, resulting in that the singlecrystal Ga₂O₃-based substrate 12 and the polycrystalline substrate 11are bonded firmly due to covalent bonding. The higher the heat treatmenttemperature, the higher the bonding strength. For example, when thepolycrystalline substrate 11 is a polycrystalline SiC substrate,stronger bonding is obtained by performing heat treatment at not lessthan 800° C.

In addition, with the heat treatment, it is possible to break the singlecrystal Ga₂O₃-based substrate 12 at the hydrogen ion implanted layer 12a. Furthermore, the temperature of the heat treatment is preferably notmore than 1100° C. so that evaporation of the single crystal Ga₂O₃-basedsubstrate 12 or diffusion of impurities can be prevented.

Next, as shown in FIG. 2E, the single crystal Ga₂O₃-based substrate 12is split along the hydrogen ion implanted layer 12 a as a brokenposition. As a result, a layer of the single crystal Ga₂O₃-basedsubstrate 12 located on the polycrystalline substrate 11 side of thehydrogen ion implanted layer 12 a and bonded to the polycrystallinesubstrate 11 is left on the polycrystalline substrate 11. The portion ofthe single crystal Ga₂O₃-based substrate 12 left on the polycrystallinesubstrate 11 is the single crystal Ga₂O₃-based substrate 10 of thesemiconductor substrate 1.

After that, the process shown in FIGS. 2A to 2E is repeated, while eachtime using the portion of the single crystal Ga₂O₃-based substrate 12separated from the polycrystalline substrate 11 as the single crystalGa₂O₃-based substrate 12 shown in FIG. 2A. It is thereby possible toform plural single crystal Ga₂O₃-based substrates 10 of thesemiconductor substrates 1 from one single crystal Ga₂O₃-based substrate12.

Effects of the First Embodiment

The semiconductor substrate 1 in the first embodiment including thesingle crystal Ga₂O₃-based substrate 12 can be used for the sameapplication as a single crystal Ga₂O₃-based substrate alone, is lessbreakable than the single crystal Ga₂O₃-based substrate, alone, of thesame thickness, and allows for a low production cost.

In addition, by using a substrate formed of a material with a higherthermal conductivity than a Ga₂O₃-based single crystal, such as apolycrystalline SiC substrate, as the polycrystalline substrate 11 ofthe semiconductor substrate 1, it is possible to improve heatdissipation of a semiconductor element formed using the semiconductorsubstrate 1.

Second Embodiment

The second embodiment is an embodiment of a semiconductor element formedusing the semiconductor substrate in the first embodiment.

FIG. 3 is a vertical cross-sectional view showing a Schottky barrierdiode 2 in the second embodiment. The Schottky barrier diode 2 is avertical Schottky barrier diode and has the semiconductor substrate 1, asingle crystal Ga₂O₃-based layer 20 on the single crystal Ga₂O₃-basedsubstrate 10 of the semiconductor substrate 1, an anode electrode 21connected to the single crystal Ga₂O₃-based layer 20, and a cathodeelectrode 22 connected to the polycrystalline substrate 11 of thesemiconductor substrate 1.

The single crystal Ga₂O₃-based substrate 10 is, e.g., a single crystalGa₂O₃ substrate having a thickness of 0.1 to 10 μm and a carrierconcentration of 1×10¹⁸ to 1×10²⁰ cm⁻³. Si or Sn, etc., is used as adopant to be implanted into the single crystal Ga₂O₃-based substrate 10.In the single crystal Ga₂O₃-based substrate 10, the higher the carrierconcentration, the lower the conduction loss. However, crystal defectsmay occur when the doping density is large. Therefore, the carrierconcentration in the single crystal Ga₂O₃-based substrate 10 ispreferably set within a range of 3×10¹⁸ to 5×10²⁰ cm⁻³.

The polycrystalline substrate 11 is, e.g., a polycrystalline SiCsubstrate having a thickness of 50 to 1000 μm and a carrierconcentration of 1×10¹⁸ to 1×10²⁰ cm⁻³. N, etc., is used as a dopant tobe implanted into the polycrystalline substrate 11.

The single crystal Ga₂O₃-based layer 20 is a layer formed on the singlecrystal Ga₂O₃-based substrate 10 by epitaxial crystal growth and is,e.g., a single crystal Ga₂O₃ layer having a thickness of 1 to 100 μm anda carrier concentration of 1×10¹⁴ to 1×10¹⁷ cm⁻³. Si or Sn, etc., isused as a dopant to be implanted into the single crystal Ga₂O₃-basedlayer 20. The carrier concentration in the single crystal Ga₂O₃-basedlayer 20 is typically lower than the carrier concentrations in thesingle crystal Ga₂O₃-based substrate 10 and the polycrystallinesubstrate 11.

The anode electrode 21 has, e.g., a stacked structure of Pt/Ti/Au and isin Schottky contact with the single crystal Ga₂O₃-based layer 20. The Ptlayer, the Ti layer and the Au layer in this case are respectively,e.g., 15 nm, 5 nm and 200 nm in thickness.

The cathode electrode 21 has, e.g., a stacked structure of Ti/Au and isin ohmic contact with the polycrystalline substrate 11. The Ti layer andthe Au layer in this case are respectively, e.g., 50 nm and 200 nm inthickness.

In the Schottky barrier diode 2, an energy barrier at an interfacebetween the anode electrode 21 and the single crystal Ga₂O₃-based layer20 as viewed from the single crystal Ga₂O₃-based layer 20 is lowered byapplying forward voltage between the anode electrode 21 and the cathodeelectrode 21 (positive potential on the anode electrode 21 side),allowing a current to flow from the anode electrode 21 to the cathodeelectrode 22. On the other hand, when reverse voltage is applied betweenthe anode electrode 21 and the cathode electrode 21 (negative potentialon the anode electrode 21 side), the flow of current is interrupted bythe Schottky barrier.

FIG. 4 is a vertical cross-sectional view showing a MOSFET 3 in thesecond embodiment. The MOSFET 3 is a vertical MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor) with a DMOSstructure (Double-diffused MOSFET), and has the semiconductor substrate1, a single crystal Ga₂O₃-based layer 30 on the single crystalGa₂O₃-based substrate 10 of the semiconductor substrate 1, a gateelectrode 32 covered with a gate insulating film 33 and buried in thesingle crystal Ga₂O₃-based layer 30, contact regions 31 formed in thesingle crystal Ga₂O₃-based layer 30 on the both sides of the gateelectrode 32, a source electrode 34 formed on the single crystalGa₂O₃-based layer 30 and connected to the contact regions 31, and adrain electrode 35 connected to the polycrystalline substrate 11 of thesemiconductor substrate 1.

The single crystal Ga₂O₃-based substrate 10 is, e.g., an n-type singlecrystal Ga₂O₃ substrate having a thickness of 10 to 500 nm and a carrierconcentration of 1×10¹⁵ to 1×10¹⁹ cm⁻³. Si or Sn, etc., is used as adopant to be implanted into the single crystal Ga₂O₃-based substrate 10.In the single crystal Ga₂O₃-based substrate 10, the higher the carrierconcentration, the lower the conduction loss. However, crystal defectsmay occur when the doping density is large. Therefore, the carrierconcentration in the single crystal Ga₂O₃-based substrate 10 ispreferably set within a range of 3×10¹⁸ to 5×10¹⁹ cm⁻³.

The polycrystalline substrate 11 is, e.g., an n-type polycrystalline SiCsubstrate having a thickness of 100 to 600 μm and a carrierconcentration of 5×10¹⁸ to 1×10²⁰ cm⁻³. N, etc., is used as a dopant tobe implanted into the polycrystalline substrate 11.

The single crystal Ga₂O₃-based layer 30 is a layer formed on the singlecrystal Ga₂O₃-based substrate 10 by epitaxial crystal growth and is,e.g., an undoped (with no intentionally added dopant) or p-type singlecrystal Ga₂O₃ layer having a thickness of 0.1 to 100 μm.

The gate electrode 32, the source electrode 34 and the drain electrode35 are formed of, e.g., a metal such as Au, Al, Ti, Sn, Ge, In, Ni, Co,Pt, W, Mo, Cr, Cu and Pb, an alloy containing two or more of suchmetals, a conductive compound such as ITO, or a conductive polymer. Theconductive polymer to be used is, e.g., a polythiophene derivative(PEDOT: poly(3,4)-ethylenedioxythiophene) doped with polystyrenesulfonate (PSS) or a polypyrrole derivative doped with TCNA, etc. Inaddition, the gate electrode 32 may have a two-layer structure composedof two different metals, e.g., Al/Ti, Au/Ni or Au/Co.

The gate insulating film 33 is formed of an insulating material such asSiO₂, AlN, SiN, Al₂O₃ or β-(Al_(x)Ga_(1-x))₂O₃ (0≤x≤1).

The contact region 31 is a region with a high n-type dopantconcentration formed by, e.g., ion implantation into the single crystalGa₂O₃-based layer 30. Si or Sn, etc., is used as a dopant to beimplanted into the contact region 31.

In the MOSFET 3, when a voltage of not less than a threshold is appliedto the gate electrode 32, channels are formed in regions of the singlecrystal Ga₂O₃-based layer 30 on the both sides of the gate electrode 32and current flows from the source electrode 34 to the drain electrode35.

Effects of the Second Embodiment

The Schottky barrier diode 2 and the MOSFET 3 in the second embodimentare formed using the semiconductor substrate 1 in the first embodimentand are thus less breakable and is lower in production cost than when asingle crystal Ga₂O₃-based substrate is used alone. In addition, byusing a substrate formed of a material with a higher thermalconductivity than a Ga₂O₃-based single crystal, such as apolycrystalline SiC substrate, as the polycrystalline substrate 11 ofthe semiconductor substrate 1, it is possible to improve heatdissipation of the Schottky barrier diode 2.

In the second embodiment, Schottky barrier diode and MOSFET have beendescribed as examples of semiconductor elements formed using thesemiconductor substrate 1 in the first embodiment. However, the sameeffects can be obtained when the semiconductor substrate 1 is used toform other semiconductor elements.

Examples

The semiconductor substrate 1 in the first embodiment was made by thesurface activated bonding method, using a single crystal Ga₂O₃ substrateas the single crystal Ga₂O₃-based substrate 10 and a polycrystalline SiCsubstrate as the polycrystalline substrate 11, and various evaluationswere conducted.

(Condition of the Bonded Interface)

FIG. 5 is a transmission electron microscope (TEM) image obtained byobserving the bonded interface between the single crystal Ga₂O₃substrate and the polycrystalline SiC substrate. The plane orientationof the principal plane of the single crystal Ga₂O₃ substrate in FIG. 5is (010). The single crystal Ga₂O₃ substrate and the polycrystalline SiCsubstrate in FIG. 5 were not heat-treated at the time of bonding.

The TEM image in FIG. 5 shows that, at the bonded interface between thesingle crystal Ga₂O₃ substrate and the polycrystalline SiC substrate,there is no intermediate layer or precipitation of foreign substances,etc., and a good bonded state was formed.

From this result, it was confirmed that the semiconductor substrate 1 inthe first embodiment with good bonded interface condition can be formedby the surface activated bonding method.

(Plane Orientation of the Single Crystal Ga₂O₃ Substrate)

Heat treatment was performed on two types of semiconductor substrates 1of which single crystal Ga₂O₃ substrates respectively have principalplanes oriented to (010) and (001), and a relation between the planeorientation of the principal plane of the single crystal Ga₂O₃ substrateand heat resistance of the semiconductor substrate 1 was examined.

When heat treatment at 500° C. was performed on the semiconductorsubstrate 1 with the single crystal Ga₂O₃ substrate having the(010)-oriented principal plane, cracks occurred and the bonded areabetween the single crystal Ga₂O₃ substrate and the polycrystalline SiCsubstrate was reduced.

In case of the semiconductor substrate 1 with the single crystal Ga₂O₃substrate having the (001)-oriented principal plane, even when heattreatments at 800° C. and 1000° C. were performed, cracks did not occurand reduction in the bonded area between the single crystal Ga₂O₃substrate and the polycrystalline SiC substrate was not observed.

From this result, it was found that high heat resistance is obtainedwhen the semiconductor substrate 1 in the first embodiment is configuredso that the single crystal Ga₂O₃-based substrate 10 has the(001)-oriented principal plane.

In addition, since the (001) plane is one of cleavage planes ofGa₂O₃-based single crystal, the single crystal Ga₂O₃-based substrate canbe easily split in the surface activated bonding method (see FIGS. 2Dand 2E).

(Heat Treatment Temperature)

Bonding strength of the semiconductor substrate 1 when heat-treated at500° C., 800° C. and 1000° C. and not heat-treated in the surfaceactivated bonding method was examined by a tensile test in accordancewith JIS R 1630. The plane orientation of the principal plane of thesingle crystal Ga₂O₃ substrate of the semiconductor substrate 1subjected to the test was (001).

In case that bonding was performed by the surface activated bondingmethod at room temperature without performing heat treatment, separationoccurred at the bonded interface between the single crystal Ga₂O₃substrate and the polycrystalline SiC substrate at the time that tensilestrength was increased to 3 MPa.

In case that heat treatment at 500° C. was performed in the surfaceactivated bonding, separation occurred at the bonded interface betweenthe single crystal Ga₂O₃ substrate and the polycrystalline SiC substrateat the time that tensile strength was increased to 7.5 MPa.

In case that heat treatment at 800° C. was performed in the surfaceactivated bonding, fracture of the single crystal Ga₂O₃ substrate (bulkfracture) occurred at the time that tensile strength was increased to11.7 MPa. In other words, fracture of the single crystal Ga₂O₃ substrateoccurred before separation occurred at the bonded interface between thesingle crystal Ga₂O₃ substrate and the polycrystalline SiC substrate.

In case that heat treatment at 1000° C. was performed in the surfaceactivated bonding, fracture of the single crystal Ga₂O₃ substrate (bulkfracture) occurred at the time that tensile strength was increased to9.8 MPa. In other words, fracture of the single crystal Ga₂O₃ substrateoccurred before separation occurred at the bonded interface between thesingle crystal Ga₂O₃ substrate and the polycrystalline SiC substrate.

It is sufficient if the bonding strength at the bonded interface (thelowest tensile strength causing separation at the interface) is not lessthan bulk fracture strength. Therefore, the bonding strength of thesemiconductor substrate 1 when heat-treated at not less than 800° C. isenough for practical use.

From this result, it was found that stronger bonding between the singlecrystal Ga₂O₃ substrate and the polycrystalline SiC substrate isobtained when heat treatment at not less than 800° C. is performed inthe surface activated bonding method.

Meanwhile, variation in the measured value in the tensile test is about±15%. Therefore, fracture of the single crystal Ga₂O₃ substrate mayoccur at a tensile strength of 8.3 MPa which is 15% lower than 9.8 MPa.Based on this, the bonding strength at the bonded interface between thesingle crystal Ga₂O₃-based substrate 10 and the polycrystallinesubstrate 11 in the semiconductor substrate 1 is preferably not lessthan 8.3 MPa.

(Fracture Toughness)

A fracture toughness test was conducted on three types of single crystalGa₂O₃ substrates with principal planes oriented to (001), (010), (−201)and on the polycrystalline SiC substrate by the indentation fracture(IF) method in accordance with JIS R 1607. The test conditions are shownin Table 1 below, the test results (fracture toughness, Kc[MPa·m^(1/2)])of the single crystal Ga₂O₃ substrates are shown in Table 2, and thetest results (fracture toughness, Kc[MPa·m^(1/2)]) of thepolycrystalline SiC substrate are shown in Table 3.

TABLE 1 Temperature, Humidity 25° C., 20% Load 1-2 kgf Load applicationrate 10 μm/s Holding time 15 seconds Number of indentations Five pointsper sample Elastic modulus (indenter method) (001) Ga₂O₃: 194 GPa (010)Ga₂O₃: 151 GPa (−201) Ga₂O₃: 190 GPa  Poly-SiC: 515 GPa

In “Elastic modulus” of Table 1, “(001) Ga₂O₃”, “(010) Ga₂O₃”, “(−201)Ga₂O₃” and “Poly-SiC” respectively mean the single crystal Ga₂O₃substrate with the principal plane oriented to (001), the single crystalGa₂O₃ substrate with the principal plane oriented to (010), the singlecrystal Ga₂O₃ substrate with the principal plane oriented to (−201), andthe polycrystalline SiC substrate.

TABLE 2 1^(st) 2^(nd) 3^(rd) 4^(th) 5^(th) point point point point pointAverage (001) Ga₂O₃ 2.6 2.4 2.5 2.5 2.0 2.4 (010) Ga₂O₃ 0.4 0.4 0.4 0.40.5 0.4 (−201) Ga₂O₃ 1.5 2.0 2.1 2.9 1.5 2.0 Average of three — 1.6plane orientations

TABLE 3 Poly-SiC 1^(st) point 4.8 2^(nd) point 4.4 3^(rd) point 5.44^(th) point 4.8 5^(th) point 4.7 6^(th) point 5.2 7^(th) point 5.68^(th) point 5.5 9^(th) point 3.8 10^(th) point 6.2 Average 5.0

In Table 2, “Average” means the average of fracture toughness valuesmeasured at five points on the substrate, and “Average of three planeorientations” means the average of the average fracture toughness valuesfor the three types of single crystal Ga₂O₃ substrates described above.In Table 3, “Average” means the average of fracture toughness valuesmeasured at ten points on the substrate.

Since the characteristics of the single crystal Ga₂O₃ substrate aredifferent depending on the plane orientation, the test was conducted onthe substrates having three typical plane orientations. The fracturetoughness values of the three types of single crystal Ga₂O₃ substratesof different plane orientations are all lower than the fracturetoughness value of the polycrystalline SiC substrate, which shows thatthe single crystal Ga₂O₃ substrates are very breakable as compared tothe polycrystalline SiC substrate. In addition, variation in thefracture toughness value among the measured points was also larger forthe single crystal Ga₂O₃ substrates than for the SiC substrate.

(Current-Voltage Characteristics)

Current-voltage characteristics of the semiconductor substrate 1 weremeasured.

FIG. 6A is a vertical cross-sectional view showing the semiconductorsubstrate 1 to which electrodes for measurement are connected. Thesingle crystal Ga₂O₃ substrate as the single crystal Ga₂O₃-basedsubstrate 10 and the polycrystalline SiC substrate as thepolycrystalline substrate 11 in the semiconductor substrate 1 wererespectively 610 μm and 350 μm in thickness. Si atoms were doped by ionimplantation into the single crystal Ga₂O₃ substrate in the region fromthe surface to the depth of 150 nm so that a box profile with aconcentration of 5×10¹⁹ cm⁻³ was formed, and activation annealing wasthen performed in a nitrogen gas atmosphere at a substrate temperatureof 950° C. for 30 minutes. After that, a 400 μm-diameter circular Ti/Auelectrode 30 was formed on the surface of the single crystal Ga₂O₃substrate and a Ti/Au electrode 31 was formed on the entire surface ofthe polycrystalline SiC substrate. In this process, an ohmic contact wasobtained between the Ti/Au electrode 30 and the single crystal Ga₂O₃substrate and between the Ti/Au electrode 31 and the polycrystalline SiCsubstrate.

FIG. 6B is a graph showing the current-voltage characteristics of thesemiconductor substrate 1 measured between the Ti/Au electrode 30 andthe Ti/Au electrode 31. Based on FIG. 6B, a linear current-voltagecharacteristic was obtained. From this, it was found that any electricalbarrier does not exist and an ohmic contact is formed at the bondedinterface between the single crystal Ga₂O₃ substrate as the singlecrystal Ga₂O₃-based substrate 10 and the polycrystalline SiC substrateas the polycrystalline substrate 11 in the semiconductor substrate 1.

(Thermal Conductivity)

With various ratios of the thickness of the single crystal Ga₂O₃-basedsubstrate 10 to the thickness of the polycrystalline substrate 11,vertical thermal conductivity of the semiconductor substrate 1 wascalculated. Table 4 below shows a relation between the ratio [%] of thethickness of the single crystal Ga₂O₃-based substrate 10 to thethickness of the polycrystalline substrate 11 and vertical thermalconductivity [W/(m·K)] of the semiconductor substrate 1.

TABLE 4 Thickness of Thickness of Thermal conductivity Ga₂O₃ layer SiClayer Ga₂O₃/SiC of bonded substrate [μm] [μm] [%] [W/mK] 1 350 0.3 317.811 350 3.1 234.0 15 350 4.3 212.4 20 350 5.7 190.9 30 350 8.6 159.9 40350 11.4 138.5 50 350 14.3 122.9 60 350 17.1 111.0 70 350 20.0 101.7 80350 22.9 94.1 90 350 25.7 87.9 100 350 28.6 82.6 200 350 57.1 55.9 300350 85.7 45.7 400 350 114.3 40.3 500 350 142.9 37.0 600 350 171.4 34.7

In Table 4, “Thickness of Ga₂O₃ layer”, “Thickness of SiC layer” and“Ga₂O₃/SiC” respectively mean the thickness of the single crystal Ga₂O₃substrate as the single crystal Ga₂O₃-based substrate 10, the thicknessof the polycrystalline SiC substrate as the polycrystalline substrate 11and the ratio of the thickness of the single crystal Ga₂O₃ substrate tothe thickness of the polycrystalline SiC substrate, and “Thermalconductivity of bonded substrate” means vertical thermal conductivity ofthe semiconductor substrate 1 which is composed of the single crystalGa₂O₃ substrate and the polycrystalline SiC substrate bonded thereto.

FIG. 7 is a graph plotting a relation between the ratio of the thicknessof the single crystal Ga₂O₃ substrate to the thickness of thepolycrystalline SiC substrate and vertical thermal conductivity of thesemiconductor substrate shown in Table 4.

Based on Table 4 and FIG. 7, the semiconductor substrate 1 has avertical thermal conductivity of not less than 100 W/(m·K), not lessthan 150 W/(m·K) and not less than 200 W/(m·K) respectively when theratio of the thickness of the single crystal Ga₂O₃-based substrate 10 tothe thickness of the polycrystalline substrate 11 is not more than 20%,not more than 10% and not more than 5%.

Although the embodiments and Examples of the invention have beendescribed, the invention is not intended to be limited to theembodiments and Examples, and the various kinds of modifications can beimplemented without departing from the gist of the invention.

In addition, the invention according to claims is not to be limited tothe embodiments and Examples described above. Further, it should benoted that all combinations of the features described in the embodimentsand Examples are not necessary to solve the problem of the invention.

INDUSTRIAL APPLICABILITY

Provided is a semiconductor substrate which includes a layer formed of aGa₂O₃-based single crystal and is excellent in mechanical strength, asemiconductor element including such a semiconductor substrate, and amethod for producing such a semiconductor substrate.

REFERENCE SIGNS LIST

-   1 SEMICONDUCTOR SUBSTRATE-   2 SCHOTTKY BARRIER DIODE-   10, 12 SINGLE CRYSTAL Ga₂O₃-BASED SUBSTRATE-   11 POLYCRYSTALLINE SUBSTRATE-   11 b, 12 b AMORPHOUS LAYER

The invention claimed is:
 1. A semiconductor substrate, comprising asingle crystal Ga₂O₃-based substrate and a polycrystalline substratethat are bonded to each other, wherein a thickness of the single crystalGa₂O₃-based substrate is smaller than a thickness of the polycrystallinesubstrate, and a fracture toughness value of the polycrystallinesubstrate is higher than a fracture toughness value of the singlecrystal Ga₂O₃-based substrate, wherein the single crystal Ga₂O₃-basedsubstrate comprises a principal plane comprising a (001) plane, whereinthe polycrystalline substrate comprises a polycrystalline SiC substrate,and wherein a bonding strength between the single crystal Ga₂O₃-basedsubstrate and the polycrystalline substrate is not less than 8.3 MPa. 2.The semiconductor substrate according to claim 1, wherein the fracturetoughness value of the polycrystalline substrate is not less than 3MPa·m^(1/2).
 3. The semiconductor substrate according to claim 1,wherein a ratio of the thickness of the single crystal Ga₂O₃-basedsubstrate to the thickness of the polycrystalline substrate is not morethan about 20%.
 4. The semiconductor substrate according to claim 1,wherein the single crystal Ga₂O₃-based substrate has a carrierconcentration of not less than 3×10¹⁸ cm⁻³.
 5. A semiconductor element,comprising the semiconductor substrate according to claim
 1. 6. A methodfor producing a semiconductor substrate, comprising: forming a firstamorphous layer by damaging a surface of a single crystal Ga₂O₃-basedsubstrate and forming a second amorphous layer by damaging a surface ofa polycrystalline SiC substrate; contacting the first amorphous layerwith the second amorphous layer; and bonding the single crystalGa₂O₃-based substrate to the polycrystalline SiC substrate by performingheat treatment of not less than 800° C. on the single crystalGa₂O₃-based substrate and the polycrystalline SiC substrate in the statethat the first amorphous layer is in contact with the second amorphouslayer, wherein the single crystal Ga₂O₃-based substrate comprises aprincipal plane comprising a (001) plane.
 7. The method for producing asemiconductor substrate according to claim 6, wherein a temperature ofthe heat treatment is not more than 1100° C.